UMW IRS2008STR(UMW)

UMW · Power Management ICs · MPN IRS2008STR(UMW)

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Specifications

Input Logic Level - Low-
Low Level Delay Time680ns
High Level Delay Time150ns
Quiescent Current300uA
Input Logic Level - High-
Operating Temperature-40℃~+125℃
Voltage - Supply10V~20V
Driven ConfigurationHalf-Bridge
Current - Output Low(IOL)600mA
Rise Time70ns
Fall Time30ns
Current - Output High(IOH)290mA

Technical details

10V~20V 600mA 290mA SOP-8 Gate Drivers RoHS

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